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SHARP: Technology for 3D-Systems-in-Package (3D-SiP)
Sharp Corporation has developed
Lead packing technology (Ball-Pitch) with a pitch of 0.5 mm for 3D Systems-in-Package (3D-SiP).
What was difficult to implement with conventional SiP technologies has now become
possible with this innovation: Stacking DSP, Flash and SDRAM in
one bag with 14 mm outline length and 1.7 mm height. Lower module
Contains DSP on a 0.25mm high substrate and fits precisely in between
0.5 mm. It houses a second module containing 32 Mbit flash memory or a choice of one or two 256 Mbit SDRAM. Logic and memory integrated circuits require 58% of the footprint compared to common technologies where DSP and memory (flash and SDRAM) are housed in two separate case stacks.
Sharp will first market two LSI circuits (LR38683 and LR38682),
which are specially designed for digital cameras with 3 sensor?10-megapixel.
Manufacturers of devices such as
mobile phones and PDAs will benefit from
application of new technology, because
it will allow the use of more powerful System-LSI
schemes in the same area. Another advantage of 3D-SiP technology is its sufficient
flexibility. Depending on the application requirements, it is possible
arrangement in various combinations of memory modules or
functional diagrams with a large number of pins, such as
logic integrated circuits. For example, in digital cameras you can
will vary the memory configuration according to the resolution of the module
- Model: LR38683 / LR38682
- Working voltage: 3.0 – 3.6V
- Configuration: DSP, 32MB Flash, 256MB SDRAM- x 2 / DSP, 32MB Flash, 256MB SDRAM- x 1
- DSP Number of pixels: 3 – 10 million.
- Flash memory access time: 100 ns
- SDRAM Sync: 100 MHz
- Case size: 14 x 14 x 1.7mm
Samples of both System-LSI diagrams LR38683 and LR38682 now
available from Sharp and distribution partners.
Serial production started in July 2021.